Sciweavers

56 search results - page 11 / 12
» Runtime scheduling of dynamic parallelism on accelerator-bas...
Sort
View
LCTRTS
2007
Springer
13 years 11 months ago
Tetris: a new register pressure control technique for VLIW processors
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
Weifeng Xu, Russell Tessier
PDCAT
2009
Springer
13 years 12 months ago
CheCUDA: A Checkpoint/Restart Tool for CUDA Applications
Abstract—In this paper, a tool named CheCUDA is designed to checkpoint CUDA applications that use GPUs as accelerators. As existing checkpoint/restart implementations do not supp...
Hiroyuki Takizawa, Katsuto Sato, Kazuhiko Komatsu,...
ICS
2007
Tsinghua U.
13 years 11 months ago
Automatic nonblocking communication for partitioned global address space programs
Overlapping communication with computation is an important optimization on current cluster architectures; its importance is likely to increase as the doubling of processing power ...
Wei-Yu Chen, Dan Bonachea, Costin Iancu, Katherine...
EUROPAR
2009
Springer
13 years 10 months ago
Automatic Calibration of Performance Models on Heterogeneous Multicore Architectures
Multicore architectures featuring specialized accelerators are getting an increasing amount of attention, and this success will probably influence the design of future High Perfor...
Cédric Augonnet, Samuel Thibault, Raymond N...
MIDDLEWARE
2004
Springer
13 years 10 months ago
Architecture for resource allocation services supporting interactive remote desktop sessions in utility grids
Emerging large scale utility computing systems like Grids promise computing and storage to be provided to end users as a utility. System management services deployed in the middle...
Vanish Talwar, Bikash Agarwalla, Sujoy Basu, Raj K...