39 search results - page 1 / 8 » SARA: Combining Stack Allocation and Register Allocation |
CC
2006
Springer
13 years 8 months ago
2006
Springer
Commonly-used memory units enable a processor to load and store multiple registers in one instruction. We showed in 2003 how to extend gcc with a stack-location-allocation (SLA) ph...
MICRO
1998
IEEE
13 years 8 months ago
1998
IEEE
This paper proposes a precise approach to register allocation for irregular-register architectures which is based on 0-1 integer programming (IP). Prior work shows that IP registe...
APLAS
2006
ACM
13 years 8 months ago
2006
ACM
Abstract. Fast dynamic compilers trade code quality for short compilation time in order to balance application performance and startup time. This paper investigates the interplay o...
EUROMICRO
1999
IEEE
13 years 8 months ago
1999
IEEE
This paper describes the DELFT-JAVA processor and the mechanisms required to dynamically translate JVM instructions into DELFT-JAVA instructions. Using a form of hardware register...
IEEEPACT
2003
IEEE
13 years 9 months ago
2003
IEEE
This paper discusses a register bank assignment problem for a popular network processor--Intel's IXP. Due to limited data paths, the network processor has a restriction that ...