175 search results - page 1 / 35 » SOC Testing Methodology and Practice |
DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
Abstract—On a commercial digital still camera (DSC) controller chip we practice a novel SOC test integration platform, solving real problems in test scheduling, test IO reduction...
DAC
2007
ACM
14 years 5 months ago
2007
ACM
Due to shrinking technology, increasing functional frequency and density, and reduced noise margins with supply voltage scaling, the sensitivity of designs to supply voltage noise...
ISCAS
2008
IEEE
13 years 10 months ago
2008
IEEE
—Software-based self-test (SBST) is a promising new technology for at-speed testing of embedded processors in SoC systems. This paper introduces an effective and efficient new ho...
ASPDAC
2007
ACM
13 years 8 months ago
2007
ACM
Abstract--An integrated test scheduling methodology for multiprocessor System-on-Chips (SOC) utilizing the functional buses for test data delivery is described. The proposed method...
ICCD
2005
IEEE
14 years 1 months ago
2005
IEEE
The manufacturing test cost for mixed-signal SOCs is widely recognized to be much higher than that for digital SOCs. It has been shown in recent prior work that the use of analog ...