Sciweavers

38 search results - page 1 / 8
» STMBench7: a benchmark for software transactional memory
Sort
View
EUROSYS
2007
ACM
14 years 1 months ago
STMBench7: a benchmark for software transactional memory
Software transactional memory (STM) is a promising technique for controlling concurrency in modern multi-processor architectures. STM aims to be more scalable than explicit coarse...
Rachid Guerraoui, Michal Kapalka, Jan Vitek
PLDI
2009
ACM
13 years 11 months ago
Stretching transactional memory
Transactional memory (TM) is an appealing abstraction for programming multi-core systems. Potential target applications for TM, such as business software and video games, are like...
Aleksandar Dragojevic, Rachid Guerraoui, Michal Ka...
RV
2010
Springer
171views Hardware» more  RV 2010»
13 years 2 months ago
Runtime Verification for Software Transactional Memories
Software transactional memories (STMs) promise simple and efficient concurrent programming. Several correctness properties have been proposed for STMs. Based on a bounded conflict ...
Vasu Singh
HIPEAC
2010
Springer
13 years 2 months ago
Energy and Throughput Efficient Transactional Memory for Embedded Multicore Systems
We propose a new design for an energy-efficient hardware transactional memory (HTM) system for power-aware embedded devices. Prior hardware transactional memory designs proposed a ...
Cesare Ferri, Samantha Wood, Tali Moreshet, R. Iri...
ISPASS
2010
IEEE
13 years 6 months ago
Understanding transactional memory performance
Abstract—Transactional memory promises to generalize transactional programming to mainstream languages and data structures. The purported benefit of transactions is that they ar...
Donald E. Porter, Emmett Witchel