124 search results - page 3 / 25 » Safraless Procedures for Timed Specifications |
ERCIMDL
2005
Springer
13 years 11 months ago
2005
Springer
The Alexandria Digital Library (ADL) project has been working on automating the processes of building ADL collections and gathering the collection statistics on which ADL’s disco...
SCOPES
2004
Springer
13 years 11 months ago
2004
Springer
Abstract. Synthesis of digital signal processing (DSP) software from dataflow-based formal models is an effective approach for tackling the complexity of modern DSP applications. I...
JMLR
2008
13 years 5 months ago
2008
Pointwise consistent, feasible procedures for estimating contemporaneous linear causal structure from time series data have been developed using multiple conditional independence ...
CASES
2010
ACM
13 years 3 months ago
2010
ACM
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
ASYNC
1997
IEEE
13 years 9 months ago
1997
IEEE
This paper presents new timing analysis algorithms for efficient state space exploration during timed circuit synthesis. Timed circuits are a class of asynchronous circuits that i...