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PACS
2004
Springer
115views Hardware» more  PACS 2004»
13 years 11 months ago
Reducing Delay and Power Consumption of the Wakeup Logic Through Instruction Packing and Tag Memoization
Dynamic instruction scheduling logic is one of the most critical components of modern superscalar microprocessors, both from the delay and power dissipation standpoints. The delay ...
Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose, ...
ISCC
2002
IEEE
135views Communications» more  ISCC 2002»
13 years 11 months ago
End-to-end versus explicit feedback measurement in 802.11 networks
Higher layer protocols in wireless networks need to dynamically adapt to observed network response. The common approach is that each session employs end-to-end monitoring to estim...
Manthos Kazantzidis, Mario Gerla