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IEEEPACT
2008
IEEE
13 years 11 months ago
Scalable and reliable communication for hardware transactional memory
In a hardware transactional memory system with lazy versioning and lazy conflict detection, the process of transaction commit can emerge as a bottleneck. This is especially true ...
Seth H. Pugsley, Manu Awasthi, Niti Madan, Naveen ...
NOMS
2010
IEEE
163views Communications» more  NOMS 2010»
13 years 2 months ago
DReaM-Cache: Distributed Real-Time Transaction Memory Cache to support two-factor authentication services and its reliability
—PhoneFactor is a two-factor authentication service that combines the knowledge-based authenticator with an objectbased authenticator in which the object-based authenticator has ...
Haiyang Qian, Chandra Sekhar Surapaneni, Marsh Ray...
DAGSTUHL
2007
13 years 6 months ago
A Case for Deconstructing Hardware Transactional Memory Systems
Major hardware and software vendors are curious about transactional memory (TM), but are understandably cautious about committing to hardware changes. Our thesis is that deconstru...
Mark D. Hill, Derek Hower, Kevin E. Moore, Michael...
ISCA
2011
IEEE
238views Hardware» more  ISCA 2011»
12 years 8 months ago
Rebound: scalable checkpointing for coherent shared memory
As we move to large manycores, the hardware-based global checkpointing schemes that have been proposed for small shared-memory machines do not scale. Scalability barriers include ...
Rishi Agarwal, Pranav Garg, Josep Torrellas
WDAG
2010
Springer
216views Algorithms» more  WDAG 2010»
13 years 2 months ago
A Scalable Lock-Free Universal Construction with Best Effort Transactional Hardware
The imminent arrival of best-effort transactional hardware has spurred new interest in the construction of nonblocking data structures, such as those that require atomic updates to...
Francois Carouge, Michael F. Spear