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» Scalably Scheduling Power-Heterogeneous Processors
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RSP
2007
IEEE
143views Control Systems» more  RSP 2007»
13 years 11 months ago
Heuristics for Dynamic Task Mapping in NoC-based Heterogeneous MPSoCs
Multiprocessor Systems-on-Chip (MPSoCs) is a trend in VLSI design, since they minimize the “design crisis” (gap between silicon technology and actual SoC design capacity) and ...
Ewerson Carvalho, Ney Calazans, Fernando Moraes
VLSID
2006
IEEE
192views VLSI» more  VLSID 2006»
13 years 11 months ago
Beyond RTL: Advanced Digital System Design
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Shiv Tasker, Rishiyur S. Nikhil
ICS
2010
Tsinghua U.
13 years 10 months ago
Handling task dependencies under strided and aliased references
The emergence of multicore processors has increased the need for simple parallel programming models usable by nonexperts. The ability to specify subparts of a bigger data structur...
Josep M. Pérez, Rosa M. Badia, Jesús...
HIPC
1999
Springer
13 years 9 months ago
Process Migration Effects on Memory Performance of Multiprocessor
Abstract. In this work we put into evidence how the memory performance of a WebServer machine may depend on the sharing induced by process migration. We considered a shared-bus sha...
Pierfrancesco Foglia, Roberto Giorgi, Cosimo Anton...