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ICPP
2003
IEEE
13 years 9 months ago
Scheduling Algorithms with Bus Bandwidth Considerations for SMPs
The bus that connects processors to memory is known to be a major architectural bottleneck in SMPs. However, both software and scheduling policies for these systems generally focu...
Christos D. Antonopoulos, Dimitrios S. Nikolopoulo...
ICPADS
2006
IEEE
13 years 9 months ago
Memory and Network Bandwidth Aware Scheduling of Multiprogrammed Workloads on Clusters of SMPs
Symmetric Multiprocessors (SMPs), combined with modern interconnection technologies are commonly used to build cost-effective compute clusters. However, contention among processor...
Evangelos Koukis, Nectarios Koziris
PDP
2005
IEEE
13 years 9 months ago
Memory Bandwidth Aware Scheduling for SMP Cluster Nodes
Clusters of SMPs are becoming increasingly common. However, the shared memory design of SMPs and the consequential contention between system processors for access to main memory c...
Evangelos Koukis, Nectarios Koziris
ICCD
2006
IEEE
131views Hardware» more  ICCD 2006»
14 years 16 days ago
Power-Constrained SOC Test Schedules through Utilization of Functional Buses
— In this paper, we are proposing a core-based test methodology that utilizes the functional bus for test stimuli and response transportation. An efficient algorithm for the gen...
Fawnizu Azmadi Hussin, Tomokazu Yoneda, Alex Orail...
DATE
2008
IEEE
138views Hardware» more  DATE 2008»
13 years 10 months ago
Functional Self-Testing for Bus-Based Symmetric Multiprocessors
Functional, instruction-based self-testing of microprocessors has recently emerged as an effective alternative or supplement to other testing approaches, and is progressively adop...
Andreas Apostolakis, Dimitris Gizopoulos, Mihalis ...