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ARVLSI
1999
IEEE
101views VLSI» more  ARVLSI 1999»
13 years 9 months ago
Multi-Chip Neuromorphic Motion Processing
We describe a multi-chip CMOS VLSI visual motion processing system which combines analog circuitry with an asynchronous digital interchip communications protocol to allow more com...
Charles M. Higgins, Christof Koch
DSN
2004
IEEE
13 years 9 months ago
A Decentralized Algorithm for Erasure-Coded Virtual Disks
A Federated Array of Bricks is a scalable distributed storage system composed from inexpensive storage bricks. It achieves high reliability with low cost by using erasure coding a...
Svend Frølund, Arif Merchant, Yasushi Saito...
ICS
2007
Tsinghua U.
13 years 11 months ago
Optimization and bottleneck analysis of network block I/O in commodity storage systems
Building commodity networked storage systems is an important architectural trend; Commodity servers hosting a moderate number of consumer-grade disks and interconnected with a hig...
Manolis Marazakis, Vassilis Papaefstathiou, Angelo...
DATE
1999
IEEE
194views Hardware» more  DATE 1999»
13 years 9 months ago
CRUSADE: Hardware/Software Co-Synthesis of Dynamically Reconfigurable Heterogeneous Real-Time Distributed Embedded Systems
Dynamically reconfigurable embedded systems offer potential for higher performance as well as adaptability to changing system requirements at low cost. Such systems employ run-tim...
Bharat P. Dav
ASPLOS
1998
ACM
13 years 9 months ago
A Cost-Effective, High-Bandwidth Storage Architecture
This paper describes the Network-Attached Secure Disk (NASD) storage architecture, prototype implementations of NASD drives, array management for our architecture, and three files...
Garth A. Gibson, David Nagle, Khalil Amiri, Jeff B...