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CAL
2006
13 years 5 months ago
A Case for Compressing Traces with BDDs
Instruction-level traces are widely used for program and hardware analysis. However, program traces for just a few seconds of execution are enormous, up to several terabytes in siz...
Graham D. Price, Manish Vachharajani
WCET
2008
13 years 6 months ago
Traces as a Solution to Pessimism and Modeling Costs in WCET Analysis
WCET analysis models for superscalar out-of-order CPUs generally need to be pessimistic in order to account for a wide range of possible dynamic behavior. CPU hardware modificatio...
Jack Whitham, Neil C. Audsley
ASPDAC
2007
ACM
89views Hardware» more  ASPDAC 2007»
13 years 9 months ago
Trace Compaction using SAT-based Reachability Analysis
In today's designs, when functional verification fails, engineers perform debugging using the provided error traces. Reducing the length of error traces can help the debugging...
Sean Safarpour, Andreas G. Veneris, Hratch Mangass...
CGO
2010
IEEE
14 years 6 days ago
Large program trace analysis and compression with ZDDs
Prior work has shown that reduced, ordered, binary decision diagrams (BDDs) can be a powerful tool for program trace analysis and visualization. Unfortunately, it can take hours o...
Graham D. Price, Manish Vachharajani