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» Serial Sum-Product Architecture for Low-Density Parity-Check...
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SIPS
2006
IEEE
13 years 11 months ago
Architecture-Aware LDPC Code Design for Software Defined Radio
Low-Density Parity-Check (LDPC) codes have been adopted in the physical layer of many communication systems because of their superior performance. The direct implementation of the...
Yuming Zhu, Chaitali Chakrabarti
ASAP
2006
IEEE
147views Hardware» more  ASAP 2006»
13 years 7 months ago
Reconfigurable Shuffle Network Design in LDPC Decoders
Several semi-parallel decoding architectures have been explored by researchers for the quasi-cyclic low density parity check (LDPC) codes. In these architectures, the reconfigurab...
Jun Tang, Tejas Bhatt, Vishwas Sundaramurthy
MSS
2007
IEEE
82views Hardware» more  MSS 2007»
13 years 11 months ago
Tornado Codes for MAID Archival Storage
This paper examines the application of Tornado Codes, a class of low density parity check (LDPC) erasure codes, to archival storage systems based on massive arrays of idle disks (...
Matthew Woitaszek, Henry M. Tufo