11 search results - page 1 / 3 » Signal-path driven partition and placement for analog circui... |
ASPDAC
2006
ACM
13 years 10 months ago
2006
ACM
This paper advances a new methodology based on signal-path information to resolve the problem of device-level placement for analog layout. This methodology is mainly based on three...
DAC
1995
ACM
13 years 8 months ago
1995
ACM
This paper presents a direct performance-driven placement algorithm for analog integrated circuits. The performance speci cations directly drive the layout tools without intermedi...
ICCD
1997
IEEE
13 years 8 months ago
1997
IEEE
Simulated annealing based standard cell placement for VLSI designs has long been acknowledged as a compute-intensive process. All previous work in parallel simulated annealing bas...
ISCAS
2007
IEEE
13 years 10 months ago
2007
IEEE
-- In interconnect-dominated designs, the ability to minimize layout-induced parasitic effects is crucial for rapid design closure. Deep sub-micron effects and ubiquitous interfere...
CLEIEJ
2010
13 years 1 months ago
2010
A 3D circuit is the stacking of regular 2D circuits. The advances on the fabrication and packaging technologies allowed interconnecting stacked 2D circuits by using 3D vias. Howeve...