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» Signal-path driven partition and placement for analog circui...
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ISPD
1999
ACM
79views Hardware» more  ISPD 1999»
13 years 8 months ago
Partitioning with terminals: a "new" problem and new benchmarks
The presence of fixed terminals in hypergraph partitioning instances arising in top-down standard-cell placement makes such instances qualitatively different from the free hyperg...
Charles J. Alpert, Andrew E. Caldwell, Andrew B. K...
ICCAD
2004
IEEE
180views Hardware» more  ICCAD 2004»
14 years 1 months ago
Physical placement driven by sequential timing analysis
Traditional timing-driven placement considers only combinational delays and does not take into account the potential of subsequent sequential optimization steps. As a result, the ...
Aaron P. Hurst, Philip Chong, Andreas Kuehlmann
ICCAD
2001
IEEE
111views Hardware» more  ICCAD 2001»
14 years 1 months ago
Congestion Aware Layout Driven Logic Synthesis
In this paper, we present novel algorithms that effectively combine physical layout and early logic synthesis to improve overall design quality. In addition, we employ partitionin...
Thomas Kutzschebauch, Leon Stok
ASPDAC
2000
ACM
159views Hardware» more  ASPDAC 2000»
13 years 9 months ago
Analytical minimization of half-perimeter wirelength
Global placement of hypergraphs is critical in the top-down placement of large timing-driven designs 10, 16 . Placement quality is evaluated in terms of the half-perimeter wirelen...
Andrew A. Kennings, Igor L. Markov
ICCAD
2004
IEEE
155views Hardware» more  ICCAD 2004»
14 years 1 months ago
A flexibility aware budgeting for hierarchical flow timing closure
—In this paper, we present a new block budgeting algorithm which speeds up timing closure in timing driven hierarchical flows. After a brief description of the addressed flow, ...
Olivier Omedes, Michel Robert, Mohammed Ramdani