Sciweavers

109 search results - page 22 / 22
» Simplifying Instruction Issue Logic in Superscalar Processor...
Sort
View
PLDI
2010
ACM
13 years 10 months ago
Decoupled lifeguards: enabling path optimizations for dynamic correctness checking tools
Dynamic correctness checking tools (a.k.a. lifeguards) can detect a wide array of correctness issues, such as memory, security, and concurrency misbehavior, in unmodified executa...
Olatunji Ruwase, Shimin Chen, Phillip B. Gibbons, ...
ISCA
2010
IEEE
176views Hardware» more  ISCA 2010»
13 years 10 months ago
Forwardflow: a scalable core for power-constrained CMPs
Chip Multiprocessors (CMPs) are now commodity hardware, but commoditization of parallel software remains elusive. In the near term, the current trend of increased coreper-socket c...
Dan Gibson, David A. Wood
EMSOFT
2006
Springer
13 years 9 months ago
Compiler-assisted leakage energy optimization for clustered VLIW architectures
Miniaturization of devices and the ensuing decrease in the threshold voltage has led to a substantial increase in the leakage component of the total processor energy consumption. ...
Rahul Nagpal, Y. N. Srikant
HPCA
2008
IEEE
14 years 5 months ago
Supporting highly-decoupled thread-level redundancy for parallel programs
The continued scaling of device dimensions and the operating voltage reduces the critical charge and thus natural noise tolerance level of transistors. As a result, circuits can p...
M. Wasiur Rashid, Michael C. Huang