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ISMVL
2007
IEEE
95views Hardware» more  ISMVL 2007»
13 years 11 months ago
Simulation of Gate Circuits with Feedback in Multi-Valued Algebras
Simulation of gate circuits is an efficient method of detecting hazards and oscillations that may occur because of delays. Ternary simulation consists of two algorithms, A and B,...
Janusz A. Brzozowski, Yuli Ye
ISMVL
2003
IEEE
111views Hardware» more  ISMVL 2003»
13 years 10 months ago
Modeling Multi-Valued Circuits in SystemC
The complexity of todays hardware systems steadily increases. Due to this fact new ways of efficiently describing systems are investigated. A very promising approach in this area...
Daniel Große, Görschwin Fey, Rolf Drech...
ATS
2000
IEEE
134views Hardware» more  ATS 2000»
13 years 9 months ago
Fsimac: a fault simulator for asynchronous sequential circuits
At very high frequencies, the major potential of asynchronous circuits is absence of clock skew and, through that, better exploitation of relative timing relations. This paper pre...
Susmita Sur-Kolay, Marly Roncken, Ken S. Stevens, ...
DAC
1996
ACM
13 years 9 months ago
Symphony: A Simulation Backplane for Parallel Mixed-Mode Co-Simulation of VLSI Systems
In this paper we present an integrated simulation paradigm in which parallel mixed-mode co-simulation is accomplished by integrating sequential simulators in a software simulation ...
Antonio R. W. Todesco, Teresa H. Y. Meng
ASPDAC
2000
ACM
99views Hardware» more  ASPDAC 2000»
13 years 9 months ago
Analysis of power-clocked CMOS with application to the design of energy-recovery circuits
⎯ This paper presents our research results on power-clocked CMOS design. First we provide algebraic expressions and describe properties of clocked signals. Next two types of powe...
Massoud Pedram, Xunwei Wu