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CODES
2003
IEEE
13 years 10 months ago
A modular simulation framework for architectural exploration of on-chip interconnection networks
Ever increasing complexity and heterogeneity of SoC platforms require diversified on-chip communication schemes beyond the currently omnipresent shared bus architectures. To prev...
Tim Kogel, Malte Doerper, Andreas Wieferink, Raine...
ISCC
2009
IEEE
262views Communications» more  ISCC 2009»
14 years 5 days ago
Babelchord: a social tower of DHT-based overlay networks
Chord is a protocol to distribute and retrieve information at large scale. It builds a large but rigid overlay network without taking into account the social nature and the underl...
Luigi Liquori, Cédric Tedeschi, Francesco B...
IWANN
1997
Springer
13 years 9 months ago
The Pattern Extraction Architecture: A Connectionist Alternative to the Von Neumann Architecture
A detailed connectionist architecture is described which is capable of relating psychological behavior to the functioning of neurons and neurochemicals. The need to be able to bui...
L. Andrew Coward
JPDC
2006
253views more  JPDC 2006»
13 years 5 months ago
Collaborative detection and filtering of shrew DDoS attacks using spectral analysis
This paper presents a new spectral template-matching approach to countering shrew distributed denial-of-service (DDoS) attacks. These attacks are stealthy, periodic, pulsing, and ...
Yu Chen, Kai Hwang
ASPDAC
2007
ACM
108views Hardware» more  ASPDAC 2007»
13 years 9 months ago
Software Performance Estimation in MPSoC Design
- Estimation tools are a key component of system-level methodologies, enabling a fast design space exploration. Estimation of software performance is essential in current software-...
Márcio Oyamada, Flávio Rech Wagner, ...