23 search results - page 1 / 5 » Simultaneous Control of Subthreshold and Gate Leakage Curren... |
ASPDAC
2007
ACM
13 years 8 months ago
2007
ACM
Power gating has been widely used to reduce subthreshold leakage. However, its efficiency degrades very fast with technology scaling due to the gate leakage of circuits specific t...
DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
In nanometer scaled CMOS devices significant increase in the subthreshold, the gate and the reverse biased junction band-toband-tunneling (BTBT) leakage, results in the large incr...
GLVLSI
2006
IEEE
13 years 10 months ago
2006
IEEE
A new circuit technique based on a single PMOS sleep transistor and a dual threshold voltage CMOS technology is proposed in this paper for simultaneously reducing subthreshold and...
VLSID
2007
IEEE
14 years 4 months ago
2007
IEEE
With scaling of CMOS technologies, sub-threshold, gate and reverse biased junction band-to-band-tunneling leakage have increased dramatically. Together they account for more than 2...
ASPDAC
2006
ACM
13 years 10 months ago
2006
ACM
— Power gating is widely accepted as an efficient way to suppress subthreshold leakage current. Yet, it suffers from gate leakage current, which grows very fast with scaling dow...