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CJ
2006
84views more  CJ 2006»
13 years 5 months ago
Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
Kostas Bousias, Nabil Hasasneh, Chris R. Jesshope
BMCBI
2005
116views more  BMCBI 2005»
13 years 5 months ago
Can Zipf's law be adapted to normalize microarrays?
Background: Normalization is the process of removing non-biological sources of variation between array experiments. Recent investigations of data in gene expression databases for ...
Timothy Lu, Christine M. Costello, Peter J. P. Cro...
PRESENCE
2002
124views more  PRESENCE 2002»
13 years 5 months ago
Near-Field Virtual Audio Displays
In tasks that require listeners to monitor two or more simultaneous talkers, substantial performance benefits can be achieved by spatially separating the competing speech messages...
Douglas Brungart
AIEDU
2010
13 years 2 months ago
Supporting Collaborative Learning and E-Discussions Using Artificial Intelligence Techniques
An emerging trend in classrooms is the use of networked visual argumentation tools that allow students to discuss, debate, and argue with one another in a synchronous fashion about...
Bruce M. McLaren, Oliver Scheuer, Jan Miksatko
CORR
2010
Springer
143views Education» more  CORR 2010»
13 years 2 months ago
Cause Clue Clauses: Error Localization using Maximum Satisfiability
Much effort is spent everyday by programmers in trying to reduce long, failing execution traces to the cause of the error. We present a new algorithm for error cause localization ...
Manu Jose, Rupak Majumdar