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» Simultaneous functional-unit binding and floorplanning
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ICCAD
2003
IEEE
152views Hardware» more  ICCAD 2003»
14 years 1 months ago
Binding, Allocation and Floorplanning in Low Power High-Level Synthesis
This work is a contribution to high level synthesis for low power systems. While device feature size decreases, interconnect power becomes a dominating factor. Thus it is importan...
Ansgar Stammermann, Domenik Helms, Milan Schulte, ...
DATE
2008
IEEE
78views Hardware» more  DATE 2008»
13 years 11 months ago
Simultaneous FU and Register Binding Based on Network Flow Method
– With the rapid increase of design complexity and the decrease of device features in nano-scale technologies, interconnection optimization in digital systems becomes more and mo...
Jason Cong, Junjuan Xu
ICCAD
1994
IEEE
76views Hardware» more  ICCAD 1994»
13 years 9 months ago
Simultaneous functional-unit binding and floorplanning
As device feature size decreases, interconnection delay becomes the dominating factor of system performance. Thus it is important that accurate physical information is used during...
Yung-Ming Fang, D. F. Wong
ICCD
2004
IEEE
119views Hardware» more  ICCD 2004»
14 years 1 months ago
Simultaneous Scheduling, Binding and Layer Assignment for Synthesis of Vertically Integrated 3D Systems
Three dimensional vertically integrated systems allow active devices to be placed on multiple device layers. In recent years, a number of research efforts have addressed physical ...
Madhubanti Mukherjee, Ranga Vemuri
DAC
2005
ACM
14 years 5 months ago
Incremental exploration of the combined physical and behavioral design space
Achieving design closure is one of the biggest headaches for modern VLSI designers. This problem is exacerbated by high-level design automation tools that ignore increasingly impo...
Zhenyu (Peter) Gu, Jia Wang, Robert P. Dick, Hai Z...