4 search results - page 1 / 1 » Simultaneous optimization of supply and threshold voltages f... |
ISLPED
1999
ACM
13 years 8 months ago
1999
ACM
The use of dual threshold voltages can significantly reduce the static power dissipated in CMOS VLSI circuits. With the supply voltage at 1V and threshold voltage as low as 0.2V ...
DAC
2004
ACM
14 years 5 months ago
2004
ACM
Electrothermal couplings between supply voltage, operating frequency, power dissipation and die temperature have been shown to significantly impact the energy-delay-product (EDP) ...
ISQED
2007
IEEE
13 years 10 months ago
2007
IEEE
Straining of silicon improves mobility of carriers resulting in speed enhancement for transistors in CMOS technology. Traditionally, silicon straining is applied in a similar ad-h...
JCSC
2002
13 years 4 months ago
2002
There is a growing need to analyze and optimize the stand-by component of power in digital circuits designed for portable and battery-powered applications. Since these circuits re...