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DAC
2006
ACM
10 years 2 months ago
Simultaneous time slack budgeting and retiming for dual-Vdd FPGA power reduction
Field programmable dual-Vdd interconnects are effective to reduce FPGA power. Assuming uniform length interconnects, existing work has developed time slack budgeting to minimize p...
Yu Hu, Yan Lin, Lei He, Tim Tuan
DAC
2005
ACM
10 years 2 months ago
Leakage efficient chip-level dual-Vdd assignment with time slack allocation for FPGA power reduction
To reduce power, Vdd programmability has been proposed recently to select Vdd-level for interconnects and to powergate unused interconnects. However, Vdd-level converters used in ...
Yan Lin, Lei He
ISPD
2006
ACM
84views Hardware» more  ISPD 2006»
9 years 7 months ago
Integrated retiming and simultaneous Vdd/Vth scaling for total power minimization
The integration of retiming and simultaneous supply/threshold voltage scaling has a potential to enable more rigorous total power reduction. However, such integration is a highly ...
Mongkol Ekpanyapong, Sung Kyu Lim
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