14 search results - page 3 / 3 » Size-Constrained Code Placement for Cache Miss Rate Reductio... |
MICRO
2003
IEEE
13 years 10 months ago
2003
IEEE
A dynamic optimizer is a runtime software system that groups a program’s instruction sequences into traces, optimizes those traces, stores the optimized traces in a softwarebase...
ISCAPDCS
2007
13 years 6 months ago
2007
— Next generation multimedia mobile phones that use the high bandwidth 3G cellular radio network consume more power. Multimedia algorithms such as speech, video transcodecs have ...
TC
1998
13 years 4 months ago
1998
—High instruction cache hit rates are key to high performance. One known technique to improve the hit rate of caches is to minimize cache interference by improving the layout of ...
CODES
2000
IEEE
13 years 9 months ago
2000
IEEE
Memory interleaving is a cost-efficient approach to increase bandwidth. Improving data access locality and reducing memory access conflicts are two important aspects to achieve hi...