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DAC
1996
ACM
13 years 8 months ago
Sizing of Clock Distribution Networks for High Performance CPU Chips
: In a high performance microprocessor such as Digital's 300MHz Alpha 21164, the distribution of a high quality clock signal to all regions of the device is achieved using a c...
Madhav P. Desai, Radenko Cvijetic, James Jensen
IPPS
1998
IEEE
13 years 8 months ago
NTI: A Network Time Interface M-Module for High-Accuracy Clock-Synchronization
This paper? provides a description of our Network Time Interface M-Module NTI supporting high-accuracy external clock synchronization by hardware. The NTI is built around our custo...
Martin Horauer, Ulrich Schmid, Klaus Schossmaier
CSREAESA
2004
13 years 6 months ago
A Distributed FIFO Scheme for System on Chip Inter-Component Communication
Interconnect delays are increasingly becoming the dominant source of performance degradation in the nano-meter regime, largely because the wires do not scale as fast as the device...
Ray Robert Rydberg III, Jabulani Nyathi, Jos&eacut...
HPCA
2001
IEEE
14 years 4 months ago
Dynamic Thermal Management for High-Performance Microprocessors
With the increasing clock rate and transistor count of today's microprocessors, power dissipation is becoming a critical component of system design complexity. Thermal and po...
David Brooks, Margaret Martonosi
ISVLSI
2008
IEEE
125views VLSI» more  ISVLSI 2008»
13 years 11 months ago
Energy Recovery from High-Frequency Clocks Using DC-DC Converters
Large digital chips use a significant amount of energy to distribute a multi-GHz clock. By discharging the clock network to ground every cycle, the energy stored in this large cap...
Mehdi Alimadadi, Samad Sheikhaei, Guy Lemieux, Sha...