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» Smart Memories: a modular reconfigurable architecture
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ISCA
2000
IEEE
118views Hardware» more  ISCA 2000»
13 years 8 months ago
Smart Memories: a modular reconfigurable architecture
Trends in VLSI technology scaling demand that future computing devices be narrowly focused to achieve high performance and high efficiency, yet also target the high volumes and lo...
Ken Mai, Tim Paaske, Nuwan Jayasena, Ron Ho, Willi...
FCCM
2003
IEEE
96views VLSI» more  FCCM 2003»
13 years 10 months ago
Data Search and Reorganization Using FPGAs: Application to Spatial Pointer-based Data Structures
FPGAs have appealing features such as customizable internal and external bandwidth and the ability to exploit vast amounts of fine-grain parallelism. In this paper we explore the ...
Pedro C. Diniz, Joonseok Park
ICDCSW
2002
IEEE
13 years 9 months ago
An Architecture Concept for Ubiquitous Computing Aware Wearable Computers
In Marc Weiser’s vision of ubiquitous computing, users are located in an environment with potentially thousands of computers around them. Many capabilities of these smart device...
Martin Bauer, Bernd Brügge, Gudrun Klinker, A...
CORR
2010
Springer
198views Education» more  CORR 2010»
13 years 4 months ago
Space and the Synchronic A-Ram
Space is a spatial programming language designed to exploit the massive parallelism available in a formal model of computation called the Synchronic A-Ram, and physically related ...
Alexander Victor Berka
DTJ
1998
171views more  DTJ 1998»
13 years 4 months ago
Measurement and Analysis of C and C++ Performance
ir increasing use of abstraction, modularity, delayed binding, polymorphism, and source reuse, especially when these attributes are used in combination. Modern processor architectu...
Hemant G. Rotithor, Kevin W. Harris, Mark W. Davis