3 search results - page 1 / 1 » Soft Error Mitigation for SRAM-Based FPGAs |
FPGA
2005
ACM
13 years 10 months ago
2005
ACM
FPGA-based designs are more susceptible to single-event upsets (SEUs) compared to ASIC designs. Soft error rate (SER) estimation is a crucial step in the design of soft error tole...
VTS
2005
IEEE
13 years 10 months ago
2005
IEEE
FPGA-based designs are more susceptible to single-event upsets (SEUs) compared to ASIC designs, since SEUs in configuration bits of FPGAs result in permanent errors in the mapped...
DFT
2007
IEEE
13 years 8 months ago
2007
IEEE
This paper presents the adoption of the Triple Modular Redundancy coupled with the Partial Dynamic Reconfiguration of Field Programmable Gate Arrays to mitigate the effects of Sof...