Sciweavers

Share
56 search results - page 1 / 12
» Software Directed Issue Queue Power Reduction
Sort
View
HPCA
2005
IEEE
11 years 4 months ago
Software Directed Issue Queue Power Reduction
The issue logic of a superscalar processor dissipates a large amount of static and dynamic power. Furthermore, its power density makes it a hot-spot requiring expensive cooling sy...
Antonio González, Jaume Abella, Michael F. ...
PACS
2000
Springer
132views Hardware» more  PACS 2000»
10 years 8 months ago
An Adaptive Issue Queue for Reduced Power at High Performance
Increasing power dissipation has become a major constraint for future performance gains in the design of microprocessors. In this paper, we present the circuit design of an issue ...
Alper Buyuktosunoglu, Stanley Schuster, David Broo...
ISLPED
2005
ACM
150views Hardware» more  ISLPED 2005»
10 years 10 months ago
Instruction packing: reducing power and delay of the dynamic scheduling logic
The instruction scheduling logic used in modern superscalar microprocessors often relies on associative searching of the issue queue entries to dynamically wakeup instructions for...
Joseph J. Sharkey, Dmitry V. Ponomarev, Kanad Ghos...
IBMRD
2006
63views more  IBMRD 2006»
10 years 4 months ago
Decomposing the load-store queue by function for power reduction and scalability
Because they are based on large content-addressable memories, load-store queues (LSQ) present implementation challenges in superscalar processors, especially as issue width and nu...
Lee Baugh, Craig B. Zilles
ICCD
2002
IEEE
113views Hardware» more  ICCD 2002»
11 years 1 months ago
System-Architectures for Sensor Networks Issues, Alternatives, and Directions
Our goal is to identify the key architectural and design issues related to Sensor Networks (SNs), evaluate the proposed solutions, and to outline the most challenging research dir...
Jessica Feng, Farinaz Koushanfar, Miodrag Potkonja...
books