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PDPTA
2007
13 years 5 months ago
Software Support for Non-Numerical Computing on Multi-Core Chips
- Multi-core chips present a new computing environment that can benefit from software support for non-numerical applications. Heterogeneous cores will allow efficient sophisticated...
Jerry Potter, Howard Jay Siegel
ISQED
2006
IEEE
101views Hardware» more  ISQED 2006»
13 years 10 months ago
Compiler-Directed Power Density Reduction in NoC-Based Multi-Core Designs
As transistor counts keep increasing and clock frequencies rise, high power consumption is becoming one of the most important obstacles, preventing further scaling and performance...
Sri Hari Krishna Narayanan, Mahmut T. Kandemir, Oz...
PPOPP
2006
ACM
13 years 10 months ago
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...
Bratin Saha, Ali-Reza Adl-Tabatabai, Richard L. Hu...
ISCA
2007
IEEE
152views Hardware» more  ISCA 2007»
13 years 10 months ago
Carbon: architectural support for fine-grained parallelism on chip multiprocessors
Chip multiprocessors (CMPs) are now commonplace, and the number of cores on a CMP is likely to grow steadily. However, in order to harness the additional compute resources of a CM...
Sanjeev Kumar, Christopher J. Hughes, Anthony D. N...
HPCA
2011
IEEE
12 years 8 months ago
HAQu: Hardware-accelerated queueing for fine-grained threading on a chip multiprocessor
Queues are commonly used in multithreaded programs for synchronization and communication. However, because software queues tend to be too expensive to support finegrained paralle...
Sanghoon Lee, Devesh Tiwari, Yan Solihin, James Tu...