Sciweavers

52 search results - page 2 / 11
» Software Transactional Memory for GPU Architectures
Sort
View
ISPASS
2010
IEEE
14 years 5 days ago
Demystifying GPU microarchitecture through microbenchmarking
—Graphics processors (GPU) offer the promise of more than an order of magnitude speedup over conventional processors for certain non-graphics computations. Because the ften prese...
Henry Wong, Misel-Myrto Papadopoulou, Maryam Sadoo...
EUROSYS
2007
ACM
14 years 2 months ago
STMBench7: a benchmark for software transactional memory
Software transactional memory (STM) is a promising technique for controlling concurrency in modern multi-processor architectures. STM aims to be more scalable than explicit coarse...
Rachid Guerraoui, Michal Kapalka, Jan Vitek
ICPP
2008
IEEE
13 years 11 months ago
Scalable Techniques for Transparent Privatization in Software Transactional Memory
—We address the recently recognized privatization problem in software transactional memory (STM) runtimes, and introduce the notion of partially visible reads (PVRs) to heuristic...
Virendra J. Marathe, Michael F. Spear, Michael L. ...
ICA3PP
2009
Springer
13 years 10 months ago
A Software Transactional Memory Service for Grids
In-memory data sharing for grids allow location-transparent access to data stored in volatile memory. Existing Grid middlewares typ- ically support only explicit data transfer betw...
Kim-Thomas Möller, Marc-Florian Müller, ...
PPOPP
2009
ACM
14 years 5 months ago
An efficient transactional memory algorithm for computing minimum spanning forest of sparse graphs
Due to power wall, memory wall, and ILP wall, we are facing the end of ever increasing single-threaded performance. For this reason, multicore and manycore processors are arising ...
Seunghwa Kang, David A. Bader