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PPOPP
2006
ACM
13 years 11 months ago
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...
Bratin Saha, Ali-Reza Adl-Tabatabai, Richard L. Hu...
ISPASS
2010
IEEE
13 years 7 months ago
Understanding transactional memory performance
Abstract—Transactional memory promises to generalize transactional programming to mainstream languages and data structures. The purported benefit of transactions is that they ar...
Donald E. Porter, Emmett Witchel
WDAG
2010
Springer
216views Algorithms» more  WDAG 2010»
13 years 3 months ago
A Scalable Lock-Free Universal Construction with Best Effort Transactional Hardware
The imminent arrival of best-effort transactional hardware has spurred new interest in the construction of nonblocking data structures, such as those that require atomic updates to...
Francois Carouge, Michael F. Spear
PLDI
2009
ACM
14 years 1 days ago
Parallelizing sequential applications on commodity hardware using a low-cost software transactional memory
Multicore designs have emerged as the mainstream design paradigm for the microprocessor industry. Unfortunately, providing multiple cores does not directly translate into performa...
Mojtaba Mehrara, Jeff Hao, Po-Chun Hsu, Scott A. M...
IPPS
2007
IEEE
13 years 11 months ago
A Key-based Adaptive Transactional Memory Executor
Software transactional memory systems enable a programmer to easily write concurrent data structures such as lists, trees, hashtables, and graphs, where non-conflicting operation...
Tongxin Bai, Xipeng Shen, Chengliang Zhang, Willia...