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SBACPAD
2008
IEEE
126views Hardware» more  SBACPAD 2008»
13 years 11 months ago
A Software Transactional Memory System for an Asymmetric Processor Architecture
Due to the advent of multi-core processors and the consequent need for better concurrent programming abstractions, new synchronization paradigms have emerged. A promising one, kno...
Felipe Goldstein, Alexandro Baldassin, Paulo Cento...
APCSAC
2007
IEEE
13 years 11 months ago
Implicit Transactional Memory in Kilo-Instruction Multiprocessors
Although they have been the main server technology for many years, multiprocessors are undergoing a renaissance due to multi-core chips and the attractive scalability properties of...
Marco Galluzzi, Enrique Vallejo, Adrián Cri...
POPL
2007
ACM
14 years 5 months ago
A concurrent constraint handling rules implementation in Haskell with software transactional memory
Constraint Handling Rules (CHR) is a concurrent committedchoice constraint logic programming language to describe transformations (rewritings) among multi-sets of constraints (ato...
Edmund S. L. Lam, Martin Sulzmann
ICPP
2008
IEEE
13 years 11 months ago
Scalable Techniques for Transparent Privatization in Software Transactional Memory
—We address the recently recognized privatization problem in software transactional memory (STM) runtimes, and introduce the notion of partially visible reads (PVRs) to heuristic...
Virendra J. Marathe, Michael F. Spear, Michael L. ...
DEBS
2008
ACM
13 years 6 months ago
Speculative out-of-order event processing with software transaction memory
In event stream applications, events flow through a network of components that perform various types of operations, e.g., filtering, aggregation, transformation. When the operatio...
Andrey Brito, Christof Fetzer, Heiko Sturzrehm, Pa...