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EUROPAR
2007
Springer
13 years 11 months ago
Toward Scalable Matrix Multiply on Multithreaded Architectures
We show empirically that some of the issues that affected the design of linear algebra libraries for distributed memory architectures will also likely affect such libraries for s...
Bryan Marker, Field G. Van Zee, Kazushige Goto, Gr...
WWW
2005
ACM
14 years 6 months ago
A multi-threaded PIPELINED Web server architecture for SMP/SoC machines
Design of high performance Web servers has become a recent research thrust to meet the increasing demand of networkbased services. In this paper, we propose a new Web server archi...
Gyu Sang Choi, Jin-Ha Kim, Deniz Ersoz, Chita R. D...
CAV
2012
Springer
265views Hardware» more  CAV 2012»
11 years 7 months ago
An Axiomatic Memory Model for POWER Multiprocessors
The growing complexity of hardware optimizations employed by multiprocessors leads to subtle distinctions among allowed and disallowed behaviors, posing challenges in specifying th...
Sela Mador-Haim, Luc Maranget, Susmit Sarkar, Kayv...
HPCA
2008
IEEE
14 years 5 months ago
Thread-safe dynamic binary translation using transactional memory
Dynamic binary translation (DBT) is a runtime instrumentation technique commonly used to support profiling, optimization, secure execution, and bug detection tools for application...
JaeWoong Chung, Michael Dalton, Hari Kannan, Chris...
TLDI
2010
ACM
225views Formal Methods» more  TLDI 2010»
14 years 2 months ago
Race-free and memory-safe multithreading: design and implementation in cyclone
We present the design of a formal low-level multi-threaded language with advanced region-based memory management and synchronization primitives, where well-typed programs are memo...
Prodromos Gerakios, Nikolaos Papaspyrou, Konstanti...