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ARITH
2003
IEEE
13 years 9 months ago
Some Optimizations of Hardware Multiplication by Constant Matrices
This paper presents some improvements on the optimization of hardware multiplication by constant matrices. We focus on the automatic generation of circuits that involve constant m...
Nicolas Boullis, Arnaud Tisserand
GLVLSI
2011
IEEE
351views VLSI» more  GLVLSI 2011»
12 years 8 months ago
Design of low-power multiple constant multiplications using low-complexity minimum depth operations
Existing optimization algorithms for the multiplierless realization of multiple constant multiplications (MCM) typically target the minimization of the number of addition and subt...
Levent Aksoy, Eduardo Costa, Paulo F. Flores, Jos&...
ISCAS
2011
IEEE
261views Hardware» more  ISCAS 2011»
12 years 8 months ago
Optimization of area in digit-serial Multiple Constant Multiplications at gate-level
— The last two decades have seen many efficient algorithms and architectures for the design of low-complexity bit-parallel Multiple Constant Multiplications (MCM) operation, tha...
Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Pa...
DSD
2010
IEEE
140views Hardware» more  DSD 2010»
13 years 4 months ago
Optimization of Area and Delay at Gate-Level in Multiple Constant Multiplications
—Although many efficient high-level algorithms have been proposed for the realization of Multiple Constant Multiplications (MCM) using the fewest number of addition and subtract...
Levent Aksoy, Eduardo Costa, Paulo F. Flores, Jos&...
IMECS
2007
13 years 6 months ago
A Common Subexpression Sharing Approach for Multiplierless Synthesis of Multiple Constant Multiplications
—In the context of multiple constant multiplications (MCM) design, we propose a novel common-subexpression-elimination (CSE) algorithm that models synthesis of coefficients into ...
Yuen-Hong Alvin Ho, Chi-Un Lei, Ngai Wong