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ICES
2005
Springer
195views Hardware» more  ICES 2005»
13 years 10 months ago
Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs
A specialized architecture was developed and evaluated to evolve relatively large sorting networks in an ordinary FPGA. Genetic unit and fitness function are also implemented on t...
Jan Korenek, Lukás Sekanina
VLDB
2012
ACM
265views Database» more  VLDB 2012»
12 years 13 days ago
Sorting networks on FPGAs
René Müller, Jens Teubner, Gustavo Alo...
ARC
2007
Springer
120views Hardware» more  ARC 2007»
13 years 9 months ago
Partially Reconfigurable Point-to-Point Interconnects in Virtex-II Pro FPGAs
Abstract. Conventional rigid router-based networks on chip incur certain overheads due to huge occupied logic resources and topology embedding, i.e., the mapping of a logical netwo...
Jae Young Hur, Stephan Wong, Stamatis Vassiliadis
ISAAC
2003
Springer
129views Algorithms» more  ISAAC 2003»
13 years 10 months ago
Lower Bounds on Correction Networks
Abstract. Correction networks are comparator networks that sort inputs differing from sorted sequences of length N in a small number of positions. The main application of such netw...
Grzegorz Stachowiak
ICCS
2004
Springer
13 years 10 months ago
Developing a Data Driven System for Computational Neuroscience
Abstract. A data driven system implies the need to integrate data acquisition and signal processing into the same system that will interact with this information. This can be done ...
Ross Snider, Yongming Zhu