529 search results - page 2 / 106 » Source Address Validation: Architecture and Protocol Design |
MSS
2003
IEEE
13 years 10 months ago
2003
IEEE
In this paper, we present a parallel transmission architecture for SAN. By using two schedulers on the destination and source addresses of packets, the load of multiple data flows...
DAC
2001
ACM
14 years 5 months ago
2001
ACM
Communication-based design represents a formal approach to systemon-a-chip design that considers communication between components as important as the computations they perform. Ou...
ICS
2009
Tsinghua U.
13 years 11 months ago
2009
Tsinghua U.
Ethernet line rates are projected to reach 100 Gbits/s by as soon as 2010. While in principle suitable for high performance clustered and parallel applications, Ethernet requires ...
RTSS
2007
IEEE
13 years 11 months ago
2007
IEEE
Time-triggered architectures (TTAs) are strong candidate platforms for safety-critical real-time applications. A typical time-triggered architecture is constituted by one or more ...
ISSADS
2005
Springer
13 years 10 months ago
2005
Springer
Classical distributed database systems monolithically offer distribution transparency and higher performance. This is made possible by making data available and closer to the appl...