9 search results - page 1 / 2 » Space-Time Scheduling of Instruction-Level Parallelism on a ... |
ASPLOS
1998
ACM
13 years 9 months ago
1998
ACM
Advances in VLSI technology will enable chips with over a billion transistors within the next decade. Unfortunately, the centralized-resource architectures of modern microprocesso...
MICRO
1993
IEEE
13 years 8 months ago
1993
IEEE
Extensive research has been done on extracting parallelism from single instruction stream processors. This paper presents some results of our investigation into ways to modify MIM...
PPOPP
1990
ACM
13 years 8 months ago
1990
ACM
Abstract - A multiprocessor system capable of exploiting fine-grained parallelism must support efficient synchronization and data passing mechanisms. This paper demonstrates the us...
HICSS
1995
IEEE
13 years 8 months ago
1995
IEEE
Abstract. We reexamine the limits of parallelism available in programs, using runtime reconstruction of program data-flow graphs. While limits of parallelism have been examined in...
ICS
1995
Tsinghua U.
13 years 8 months ago
1995
Tsinghua U.
Modulo scheduling is an e cient technique for exploiting instruction level parallelism in a variety of loops, resulting in high performance code but increased register requirement...