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» Specification and verification of pipelining in the ARM2 RIS...
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TODAES
1998
68views more  TODAES 1998»
13 years 4 months ago
Specification and verification of pipelining in the ARM2 RISC microprocessor
Abstract State Machines (ASMs) provide a sound mathematical basis for the specification and verification of systems. An application of the ASM methodology to the verification of a ...
James K. Huggins, David Van Campenhout
DAC
1994
ACM
13 years 8 months ago
Automatic Verification of Pipelined Microprocessors
Abstract - We address the problem of automatically verifying large digital designs at the logic level, against high-level specifications. In this paper, we present a methodology wh...
Vishal Bhagwati, Srinivas Devadas
VLSID
2007
IEEE
97views VLSI» more  VLSID 2007»
14 years 4 months ago
Efficient Microprocessor Verification using Antecedent Conditioned Slicing
We present a technique for automatic verification of pipelined microprocessors using model checking. Antecedent conditioned slicing is an efficient abstraction technique for hardw...
Shobha Vasudevan, Vinod Viswanath, Jacob A. Abraha...
ACSD
1998
IEEE
90views Hardware» more  ACSD 1998»
13 years 8 months ago
Verification of Pipelined Microprocessors by Correspondence Checking in Symbolic Ternary Simulation
This paper makes the idea of memory shadowing [5] applicable to symbolic ternary simulation. Memory shadowing, an extension of Burch and Dill's pipeline verification method [...
Miroslav N. Velev, Randal E. Bryant
DATE
2003
IEEE
104views Hardware» more  DATE 2003»
13 years 9 months ago
Efficient Field Processing Cores in an Innovative Protocol Processor System-on-Chip
We present an innovative protocol processor component that combines wire-speed processing for low-level, and best effort processing for higher-level protocols. The component is a ...
George Lykakis, N. Mouratidis, Kyriakos Vlachos, N...