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» Speculative Alias Analysis for Executable Code
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IJPP
2000
94views more  IJPP 2000»
13 years 4 months ago
Path Analysis and Renaming for Predicated Instruction Scheduling
Increases in instruction level parallelism are needed to exploit the potential parallelism available in future wide issue architectures. Predicated execution is an architectural m...
Lori Carter, Beth Simon, Brad Calder, Larry Carter...
WCRE
2009
IEEE
13 years 11 months ago
Automatic Static Unpacking of Malware Binaries
—Current malware is often transmitted in packed or encrypted form to prevent examination by anti-virus software. To analyze new malware, researchers typically resort to dynamic c...
Kevin Coogan, Saumya K. Debray, Tasneem Kaochar, G...
ISCA
1992
IEEE
125views Hardware» more  ISCA 1992»
13 years 9 months ago
Limits of Control Flow on Parallelism
This paper discusses three techniques useful in relaxing the constraints imposed by control flow on parallelism: control dependence analysis, executing multiple flows of control s...
Monica S. Lam, Robert P. Wilson
ICS
2001
Tsinghua U.
13 years 9 months ago
Multiplex: unifying conventional and speculative thread-level parallelism on a chip multiprocessor
Recent proposals for Chip Multiprocessors (CMPs) advocate speculative, or implicit, threading in which the hardware employs prediction to peel off instruction sequences (i.e., imp...
Chong-liang Ooi, Seon Wook Kim, Il Park, Rudolf Ei...
ICS
2005
Tsinghua U.
13 years 10 months ago
Improving the computational intensity of unstructured mesh applications
Although unstructured mesh algorithms are a popular means of solving problems across a broad range of disciplines—from texture mapping to computational fluid dynamics—they ar...
Brian S. White, Sally A. McKee, Bronis R. de Supin...