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SPAA
2009
ACM
14 years 5 months ago
Speed scaling of processes with arbitrary speedup curves on a multiprocessor
We consider the setting of a multiprocessor where the speeds of the m processors can be individually scaled. Jobs arrive over time and have varying degrees of parallelizability. A...
Ho-Leung Chan, Jeff Edmonds, Kirk Pruhs
DSN
2007
IEEE
13 years 11 months ago
Utilizing Dynamically Coupled Cores to Form a Resilient Chip Multiprocessor
Aggressive CMOS scaling will make future chip multiprocessors (CMPs) increasingly susceptible to transient faults, hard errors, manufacturing defects, and process variations. Exis...
Christopher LaFrieda, Engin Ipek, José F. M...
LSSC
2005
Springer
13 years 10 months ago
Systolic Architecture for Adaptive Censoring CFAR PI Detector
A new parallel algorithm for signal processing and a parallel systolic architecture of a robust constant false alarm rate (CFAR) processor with post-detection integration and adap...
Ivan Garvanov, Christo A. Kabakchiev, Plamen Daska...
ICCD
2007
IEEE
120views Hardware» more  ICCD 2007»
14 years 1 months ago
Statistical timing analysis using Kernel smoothing
We have developed a new statistical timing analysis approach that does not impose any assumptions on the nature of manufacturing variability and takes into account an arbitrary mo...
Jennifer L. Wong, Azadeh Davoodi, Vishal Khandelwa...