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» Speeding Up Evaluation of Powers and Monomials
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HPCA
2006
IEEE
14 years 6 months ago
Exploiting parallelism and structure to accelerate the simulation of chip multi-processors
Simulation is an important means of evaluating new microarchitectures. Current trends toward chip multiprocessors (CMPs) try the ability of designers to develop efficient simulato...
David A. Penry, Daniel Fay, David Hodgdon, Ryan We...
CPAIOR
2009
Springer
14 years 6 days ago
Optimal Interdiction of Unreactive Markovian Evaders
The interdiction problem arises in a variety of areas including military logistics, infectious disease control, and counter-terrorism. In the typical formulation of network interdi...
Alexander Gutfraind, Aric A. Hagberg, Feng Pan
DSN
2007
IEEE
13 years 12 months ago
Utilizing Dynamically Coupled Cores to Form a Resilient Chip Multiprocessor
Aggressive CMOS scaling will make future chip multiprocessors (CMPs) increasingly susceptible to transient faults, hard errors, manufacturing defects, and process variations. Exis...
Christopher LaFrieda, Engin Ipek, José F. M...
CCS
2009
ACM
14 years 13 days ago
Large-scale malware indexing using function-call graphs
A major challenge of the anti-virus (AV) industry is how to effectively process the huge influx of malware samples they receive every day. One possible solution to this problem i...
Xin Hu, Tzi-cker Chiueh, Kang G. Shin
ISPASS
2008
IEEE
14 years 1 days ago
Dynamic Thermal Management through Task Scheduling
The evolution of microprocessors has been hindered by their increasing power consumption and the heat generation speed on-die. High temperature impairs the processor’s reliabili...
Jun Yang 0002, Xiuyi Zhou, Marek Chrobak, Youtao Z...