25 search results - page 2 / 5 » Standby Leakage Power Reduction Technique for Nanoscale CMOS... |
JCSC
2002
13 years 4 months ago
2002
There is a growing need to analyze and optimize the stand-by component of power in digital circuits designed for portable and battery-powered applications. Since these circuits re...
GLVLSI
2007
IEEE
13 years 10 months ago
2007
IEEE
- The Multi-Threshold CMOS (MTCMOS) technology has become a popular technique for standby power reduction. This technology utilizes high-Vth sleep transistors to reduce subthreshol...
ISCAS
2007
IEEE
13 years 10 months ago
2007
IEEE
Abstract— We study leakage-power reduction in standby random access memories (SRAMs) during data-retention. An SRAM cell requires a minimum critical supply voltage (DRV) above wh...
DAC
2002
ACM
14 years 5 months ago
2002
ACM
Reducing power dissipation is one of the most principle subjects in VLSI design today. Scaling causes subthreshold leakage currents to become a large component of total power diss...
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
— In this paper we explore the relationship between power and area. By exploiting parallelism (and thus using more area) one can reduce the switching frequency allowing a reducti...