22 search results - page 5 / 5 » Static Scheduling of Multi-Domain Memories For Functional Ve... |
SIGOPS
2010
13 years 5 days ago
2010
Modern chip-level multiprocessors (CMPs) contain multiple processor cores sharing a common last-level cache, memory interconnects, and other hardware resources. Workloads running ...
MICRO
2005
IEEE
13 years 11 months ago
2005
IEEE
An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...