44 search results - page 1 / 9 » Statistical approach in a system level methodology to deal w... |
CODES
2010
IEEE
13 years 2 months ago
2010
IEEE
The impact of process variation in state of the art technology makes traditional (worst case) designs unnecessarily pessimistic, which translates to suboptimal designs in terms of...
DAC
2004
ACM
13 years 8 months ago
2004
ACM
The ability to control the variations in IC fabrication process is rapidly diminishing as feature sizes continue towards the sub-100 nm regime. As a result, there is an increasing...
TVLSI
2010
12 years 11 months ago
2010
Abstract-- The operational characteristics of integrated circuits based on nanoscale semiconductor technology are expected to be increasingly affected by variations in the manufact...
TCAD
2008
13 years 4 months ago
2008
Manufacturing process variations lead to variability in circuit delay and, if not accounted for, can cause excessive timing yield loss. The familiar traditional approaches to timin...
ICPPW
2002
IEEE
13 years 9 months ago
2002
IEEE
This paper presents a methodology for aiding a scientific programmer to evaluate the performance of parallel programs on advanced architectures. It applies well-defined design o...