15 search results - page 1 / 3 » Statistical simulation of chip multiprocessors running multi... |
ICCD
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper explores statistical simulation as a fast simulation technique for driving chip multiprocessor (CMP) design space exploration. The idea of statistical simulation is to ...
TCAD
2008
13 years 4 months ago
2008
Three-dimensional integration has the potential to improve the communication latency and integration density of chip-level multiprocessors (CMPs). However, the stacked highpower de...
HIPEAC
2011
Springer
12 years 4 months ago
2011
Springer
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
DATE
2004
IEEE
13 years 8 months ago
2004
IEEE
This work focuses on communication architecture analysis for multi-processor Systems-on-Chips (MPSoCs), and it leverages a SystemC-based platform to simulate a complete multi-proc...
HPCA
2000
IEEE
13 years 8 months ago
2000
IEEE
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...