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ASPLOS
2011
ACM
12 years 8 months ago
Mnemosyne: lightweight persistent memory
New storage-class memory (SCM) technologies, such as phasechange memory, STT-RAM, and memristors, promise user-level access to non-volatile storage through regular memory instruct...
Haris Volos, Andres Jaan Tack, Michael M. Swift
SOSP
2005
ACM
14 years 2 months ago
Hibernator: helping disk arrays sleep through the winter
Energy consumption has become an important issue in high-end data centers, and disk arrays are one of the largest energy consumers within them. Although several attempts have been...
Qingbo Zhu, Zhifeng Chen, Lin Tan, Yuanyuan Zhou, ...
ISCA
2012
IEEE
243views Hardware» more  ISCA 2012»
11 years 7 months ago
BlockChop: Dynamic squash elimination for hybrid processor architecture
Hybrid processors are HW/SW co-designed processors that leverage blocked-execution, the execution of regions of instructions as atomic blocks, to facilitate aggressive speculative...
Jason Mars, Naveen Kumar
COMPUTER
2000
138views more  COMPUTER 2000»
13 years 5 months ago
Making Pointer-Based Data Structures Cache Conscious
Processor and memory technology trends portend a continual increase in the relative cost of accessing main memory. Machine designers have tried to mitigate the effect of this tren...
Trishul M. Chilimbi, Mark D. Hill, James R. Larus
NOCS
2007
IEEE
13 years 11 months ago
The Power of Priority: NoC Based Distributed Cache Coherency
The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...
Evgeny Bolotin, Zvika Guz, Israel Cidon, Ran Ginos...