73 search results - page 1 / 15 » Steiner network construction for timing critical nets |
DAC
2006
ACM
13 years 8 months ago
2006
ACM
Conventionally, signal net routing is almost always implemented as Steiner trees. However, non-tree topology is often superior on timing performance as well as tolerance to open f...
VLSID
2002
IEEE
14 years 4 months ago
2002
IEEE
In this paper, we propose a hierarchical timing-driven Steiner tree algorithm for global routing which considers the minimization of timing delay during the tree construction as t...
ISPD
2003
ACM
13 years 9 months ago
2003
ACM
— In order to achieve timing closure on increasingly complex IC designs, buffer insertion needs to be performed on thousands of nets within an integrated physical synthesis syste...
TCAD
2008
13 years 4 months ago
2008
Given a set of pins and a set of obstacles on a plane, an obstacle-avoiding rectilinear Steiner minimal tree (OARSMT) connects these pins, possibly through some additional points (...
GLVLSI
2010
IEEE
13 years 6 months ago
2010
IEEE
For timing-driven or yield-driven designs, non-tree routing has become more and more popular and additional loops provide the redundant paths to protect against the effect of the ...