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ASYNC
2004
IEEE
98views Hardware» more  ASYNC 2004»
13 years 8 months ago
Synthesis of Speed Independent Circuits Based on Decomposition
This paper presents a decomposition method for speedindependent circuit design that is capable of significantly reducing the cost of synthesis. In particular, this method synthesi...
Tomohiro Yoneda, Hiroomi Onda, Chris J. Myers
WCE
2007
13 years 5 months ago
Avoiding Hazards for Speed-Independent Logic Design
- In the speed-independent logic, the hazards caused by input inverters are identified. The known methods of the elimination of such hazards are based on avoiding input inverters. ...
Igor Lemberski
TCAD
1998
82views more  TCAD 1998»
13 years 4 months ago
Structural methods for the synthesis of speed-independent circuits
Most existing tools for the synthesisof asynchronouscircuits from Signal Transition Graphs (STGs) derive the reachability graph for the calculation of logic equations. This paper ...
Enric Pastor, Jordi Cortadella, Alex Kondratyev, O...
ACSD
2001
IEEE
121views Hardware» more  ACSD 2001»
13 years 8 months ago
A structural encoding technique for the synthesis of asynchronous circuits
This paper presents a method for the automatic synthesis of asynchronous circuits from Petri net specifications. The method is based on a structural encoding of the system in such ...
Josep Carmona, Jordi Cortadella, Enric Pastor
TCAD
1998
82views more  TCAD 1998»
13 years 4 months ago
LOT: Logic Optimization with Testability. New transformations for logic synthesis
—A new approach to optimize multilevel logic circuits is introduced. Given a multilevel circuit, the synthesis method optimizes its area while simultaneously enhancing its random...
Mitrajit Chatterjee, Dhiraj K. Pradhan, Wolfgang K...