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» Subgridding method for speeding up FD-TLM circuit simulation
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ISCAS
2003
IEEE
120views Hardware» more  ISCAS 2003»
13 years 9 months ago
Subgridding method for speeding up FD-TLM circuit simulation
Baohua Wang, Pinaki Mazumder
ASPDAC
1999
ACM
100views Hardware» more  ASPDAC 1999»
13 years 8 months ago
Node Sampling Technique to Speed Up Probability-Based Power Estimation Methods
We propose a new technique called node sampling to speed up the probability-based power estimation methods. It samples and processes only a small portion of total nodes to estimat...
Hoon Choi, Hansoo Kim, In-Cheol Park, Seung Ho Hwa...
ICCAD
2002
IEEE
108views Hardware» more  ICCAD 2002»
14 years 1 months ago
A precorrected-FFT method for simulating on-chip inductance
The simulation of on-chip inductance using PEEC-based circuit analysis methods often requires the solution of a subproblem where an extracted inductance matrix must be multiplied ...
Haitian Hu, David Blaauw, Vladimir Zolotov, Kaushi...
ICCAD
2004
IEEE
80views Hardware» more  ICCAD 2004»
14 years 1 months ago
HiSIM: hierarchical interconnect-centric circuit simulator
To ensure the power and signal integrity of modern VLSI circuits, it is crucial to analyze huge amount of nonlinear devices together with enormous interconnect and even substrate ...
Tsung-Hao Chen, Jeng-Liang Tsai, Tanay Karnik
ICCAD
2009
IEEE
98views Hardware» more  ICCAD 2009»
13 years 2 months ago
GHM: A generalized Hamiltonian method for passivity test of impedance/admittance descriptor systems
A generalized Hamiltonian method (GHM) is proposed for passivity test of descriptor systems (DSs) which describe impedance or admittance input-output responses. GHM can test passi...
Zheng Zhang, Chi-Un Lei, Ngai Wong