921 search results - page 1 / 185 » SyCE: An Integrated Environment for System Design in SystemC |
RSP
2005
IEEE
13 years 10 months ago
2005
IEEE
We present an integrated system design environment for SystemC, called SyCE. The system consists of several components for efficient analysis, verification and debugging of Syst...
FDL
2007
IEEE
13 years 11 months ago
2007
IEEE
Since its first release the system level language SystemC had a significant impact on various areas in VLSI-CAD. One remarkable benefit of SystemC lies in the of abstraction le...
DT
2006
13 years 4 months ago
2006
process: Designers must define higher abstraction levels that allow system modeling. They must use description languages that handle both hardware and software components to descri...
FDL
2005
IEEE
13 years 10 months ago
2005
IEEE
Verification and validation are key issues for today's SoC design projects. This paper presents the implementation of a SystemC based environment for transaction-based verifi...
CODES
2007
IEEE
13 years 8 months ago
2007
IEEE
System-level and Platform-based design, along with Transaction Level modeling (TLM) techniques and languages like SystemC, appeared as a response to the ever increasing complexity...