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» Symbolic Model Checking of Finite Precision Timed Automata
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CHARME
2003
Springer
73views Hardware» more  CHARME 2003»
13 years 9 months ago
Towards Diagrammability and Efficiency in Event Sequence Languages
Industrial verification teams are actively developing suitable event sequence languages for hardware verification. Such languages must be expressive, designer friendly, and hardwar...
Kathi Fisler
POPL
2005
ACM
14 years 6 months ago
Synthesis of interface specifications for Java classes
While a typical software component has a clearly specified (static) interface in terms of the methods and the input/output types they support, information about the correct sequen...
P. Madhusudan, Pavol Cerný, Rajeev Alur, Wo...
ENTCS
2002
139views more  ENTCS 2002»
13 years 5 months ago
Automatic Verification of the IEEE-1394 Root Contention Protocol with KRONOS and PRISM
We report on the automatic verification of timed probabilistic properties of the IEEE 1394 root contention protocol combining two existing tools: the real-time modelchecker Kronos...
Conrado Daws, Marta Z. Kwiatkowska, Gethin Norman
CSDA
2008
110views more  CSDA 2008»
13 years 5 months ago
Computing and using residuals in time series models
The most often used approaches to obtaining and using residuals in applied work with time series models, are unified and documented with both partially-known and new features. Spe...
José Alberto Mauricio
CONCUR
1998
Springer
13 years 10 months ago
Algebraic Techniques for Timed Systems
Performance evaluation is a central issue in the design of complex real-time systems. In this work, we propose an extension of socalled "Max-Plus" algebraic techniques to...
Albert Benveniste, Claude Jard, Stephane Gaubert